QHFSSPyaedt#

class QHFSSPyaedt(multilayer_design: MultiPlanar, renderer_type: str = 'HFSS', project_name: str | None = None, design_name: str | None = None, initiate=False, options: Dict = None)[source]#

Subclass of pyaedt renderer for running HFSS simulations.

QPyaedt Default Options:

Create a QRenderer for HFSS simulations using pyaedt and multiplanar design. QHFSSPyaedt is subclassed from QPyaedt, subclassed from QRendererAnalysis and subclassed from QRenderer. The default_setup options are expected to be defined by child class of QHFSSPyaedt for driven-modal and eigenmode solution types.

Parameters:

multilayer_design (MultiPlanar) – Use QGeometry within MultiPlanar to obtain elements for Ansys.
renderer_type (str) – Choose string from list [‘HFSS_DM’, ‘HFSS_EM’, ‘Q3D’] for the type of design to insert into project.
project_name (Union[str, None], optional) – Give a name, or one will be made based on class name of renderer. Defaults to None.
design_name (Union[str, None], optional) – Give a name, or one will be made based on class name of renderer. Defaults to None.
initiate (bool, optional) – True to initiate the renderer. Defaults to False.
options (Dict, optional) – Used to override all options. Defaults to None.

Attributes

GROUPS = ['Non Model', 'Solids', 'Unclassified', 'Sheets', 'Lines']#

NAME_DELIM = '_'#: Name delimiter

aedt_hfss_options = {'port_inductor_gap': '10um'}#: aedt HFSS Options

default_options = {'Cj': 0, 'Lj': 1e-08, 'begin_disable_autosave': True, 'close_enable_autosave': True, 'sample_holder_bottom': '-1.2mm', 'sample_holder_top': '1.2mm', 'x_buffer_width_mm': 0.25, 'y_buffer_width_mm': 0.25}#: Default options

default_setup = ({'drivenmodal': {'basis_order': '1', 'freq_ghz': '5.0', 'max_delta_s': '0.1', 'max_passes': '10', 'min_converged': '1', 'min_passes': '1', 'name': 'Setup', 'pct_refinement': '30'}, 'eigenmode': {'basis_order': '-1', 'max_delta_f': '0.5', 'max_passes': '10', 'min_converged': '1', 'min_freq_ghz': '1', 'min_passes': '1', 'n_modes': '1', 'name': 'Setup', 'pct_refinement': '30'}},)#: Default setup.

design#: Return a reference to the parent design object.

desktop#

Access to hidden variable for Ansys desktop.

Returns:: easier reference to pyaedt desktop.
Return type:: pyaedt.desktop.Desktop

element_extensions = {}#: Element extensions dictionary

element_table_data = {'junction': {'capacitance': 0, 'inductance': 1e-08}, 'path': {'wire_bonds': False}}#: Element table data.

logger#: Returns the logger.

name = 'aedt_hfss'#: Name

options#: Options for the QRenderer.

renderer_types = ['HFSS_DM', 'HFSS_EM', 'Q3D']#

Methods

activate_user_project_design()#: If Ansys is not started, then start using the project and name defined by user. Otherwise, activate the project and design that user chose. It appears that pyaedt can identify the project, if needed, we can pro-actively activate the project.

add_endcaps(layer_open_pins_list: list, layer_num: int, endcap_str: str = 'endcap')#

Add a list of end-caps for open pins for a specific layer ONLY. This method ASSUMES there is something in open_pins list. This method ASSUMES that the components and corresponding pins are within design. This method ASSUMES the list already corresponds to the layer number. This method wil make a sublist of open_pins for each the layer_num passed.

Parameters:

open_pins (list) – list of tuples with (component name , pin name) JUST for the layer passed to this method.
layer_num (int) – The layer which the end-caps should be on.
endcap_str (str) – Used to name the geometry when rendered to Ansys.

add_fillet_linestring(qgeom: Series, points_3d: list, qc_fillet: float, a_polyline: pyaedt.modeler.Primitives.Polyline)#

Determine the idx of Polyline vertices to fillet and fillet them.

Parameters:

qgeom (pd.Series) – One row from QGeometry table._
points_3d (list) – Each entry is list of x,y,z vertex.
qc_fillet (float) – Radius of fillet value
a_polyline (pyaedt.modeler.Primitives.Polyline) – A pyaetd primitive used for linestring from qgeometry table.

add_jj_to_ports(jj_to_port: list, jj_to_port_dict: dict, layer_num: int)[source]#

add_linestring_width(qc_width: float, a_polyline: pyaedt.modeler.Primitives.Polyline, points_3d: list, material: str) → pyaedt.modeler.Primitives.Polyline#

Determine the orthogonal vector. Then sweep along a_polyline using qc_width. Then return the reference to new polyline with sweep in Ansys.

Parameters:

qc_width (float) – The width of polyline to generate.
a_polyline (pyaedt.modeler.Primitives.Polyline) – The center of desired polyline.
points_3d (list) – [[x0,y0,z0], ….[xn,yn,zn]] List of list of points used for a_polyline.
material (str) – The material to widen.

Returns:

Reference to polyline that was widened.

Return type:

pyaedt.modeler.Primitives.Polyline

add_one_endcap(comp_name: str, pin_name: str, layer: int, endcap_str: str = 'endcap')#

Create a rectangle, then add thickness and denote to be subtracted for open pin.

Parameters:

comp_name (str) – Component which has the open pin.
pin_name (str) – Name of pin which in open within the component.
layer (int) – The layer which the user choose to put the component on.
endcap_str (str) – Used to name the geometry when rendered to Ansys.

add_ports(port_list: list, port_list_dict: dict, layer_num: int)[source]#

add_table_data_to_QDesign(class_name: str)#

During init of renderer, this needs to happen. In particular, each renderer needs to update custom columns and values within QDesign.

Parameters:: class_name (str) – Name from cls.name for each renderer.

aedt_render_by_layer_then_tables(open_pins: list | None, port_list: list | None, jj_to_port: list | None, ignored_jjs: list | None, skip_junction: bool = False, data_type: int = 0)[source]#

_summary_

Parameters:

skip_junction (bool, optional) – Should the renderer add junctions to HFSS. Defaults to False.
open_pins (Union[list, None], optional) – Which pins will have small rectangle of substrate subtracted to be an endcap. Use definition from render_design. Defaults to None.
port_list (Union[list, None], optional) – Use definition from render_design. Defaults to None.
jj_to_port (Union[list, None], optional) – Use definition from render_design. Defaults to None.
ignored_jjs (Union[list, None], optional) – Use definition from render_design. Defaults to None.
datatype (int, optional) – This comes for the layer_stack file; regarding layer and datatype. Defaults to 0.

auto_wirebonds(table)#

Adds wirebonds to the Ansys model for path elements where; subtract = True and wire_bonds = True.

Uses render options for determining of the: * wb_threshold – the minimum distance between two vertices of a path for a wirebond to be added. * wb_offset – offset distance for wirebond placement (along the direction of the cpw) * wb_size – controls the width of the wirebond (wb_size * path[‘width’])

chip_designation_error()#: Warning message that appears when the Ansys renderer fails to locate a component’s chip designation. Provides instructions for a temporary workaround until the layer stack is finalized.

chip_not_main()#: Warning message that appears when a component’s chip designation is not ‘main’. As of 05/10/21, all chip designations should be ‘main’ until the layer stack is finalized. Provides instructions for a temporary workaround until the layer stack is finalized.

clean_user_design()#

Clean the user project and design corresponding to the current_app

Args: None

Returns: None

close()#

Alias of _close_renderer()

Returns:: True
Return type:: bool

confirm_ignored_jjs_has_valid_request(ignored_jjs: list, pair_used: list) → bool[source]#

Check within the qgeometry junction table to confirm the component_name and element_name are paired on a row.

Parameters:

ignored_jjs (list) – List of tuples of (component name, element_name)
pair_used (list) – Passed to multiple checks to ensure (component_name, pin) are not accidentally reused.

Returns:

True if pair in junction table.: False if any entry in list not found in design.

Return type:

bool

confirm_jj_to_port_has_valid_request(jj_to_port: list, pair_used: list) → bool[source]#

The jj_to_port, make sure the component_nam and element type are in design.

Parameters:

jj_to_port (list) – List of tuples denoted (component_name, element_name, impedance).
pair_used (list) – Passed to multiple checks to ensure (component_name, pin) are not accidentally reused.

Returns:

True if pair in junction table.: False if any entry in list not found in design.

Return type:

bool

confirm_open_pins_are_valid_names(open_pins: list, pair_used: list) → bool#

Check if all names of components and corresponding pins are within design. Otherwise log an error

Parameters:

open_pins (list) – The user input for open_pins.
pair_used (list) – Passed to multiple checks to ensure (component_name, pin) are not accidentally reused.

Returns:

True if all components and pins found in design.: False if any one component or pin is not found in design.

Return type:

bool

confirm_port_list_have_valid_request(port_list: list, pair_used: list) → bool[source]#

Check if all names of ports are within design. Otherwise log an error.

Parameters:

port_list (list) – The user input for ports. List of tuples of pins to be rendered as ports.
pair_used (list) – Passed to multiple checks to ensure (component_name, pin) are not accidentally reused.

Returns:

True if all ports found in design.: False if any one component or pin is not found in design.

Return type:

bool

create_fill_true_box()#: Create 3D box used for both fill and or as a subtract box for geometries when subtract==True from qgeometry table.

disconnect_ansys()#: Disconnect Ansys. In future, may want this to behave differently.

draw_sample_holder()[source]#

Adds a vacuum box to HFSS design. The xy coordinates are determined by results of using box_plus_buffer. The z coordinate of the box is determined by default_options of this class. This the user can update the options prior to render_design.

Note: the height of the box is NOT found by going to Multiplanar Design.

force_exit_ansys()#: This will allow user to force closing of Ansys.

get_chip_names() → List[str]#

Obtain a list of chips on which the selection of components, if valid, resides.

Returns:: Chips to render.
Return type:: List[str]

get_ignored_jjs_in_layer(ignored_jjs, layer_num: int) → list[source]#

Reduce the ignored_jjs list and only return the ignored_jjs for layer_nums.

Parameters:

ignored_jjs (_type_) – Use definition from render_design.
layer_num (int) – The layer number to render.

Returns:

Use definition from render_design.

Return type:

list

get_jj_to_port_in_layer(jj_to_port: list, layer_num: int) → list[source]#

Reduce the port_list list and only return the port_list for layer_nums. This is very similar to get_port_list_in_layer. This format is different than what was done with renderer with comm port. The inductance and creation of extra sheet has been dropped.

Parameters:

jj_to_port (list) – Use definition from render_design.
layer_num (int) – The layer number to render.

Returns:

Use definition from render_design.

Return type:

list

get_open_pins_in_layer(open_pins: list, layer_num: int) → list#

Reduce the open_pins list and only return the open_pins for layer_nums.

Parameters:

open_pins (list) – The list given by user for render_design.
layer_num (int) – The layer number being rendered.

Returns:

A subset of open_pins for the denoted layer_num.

Return type:

list

get_port_list_in_layer(port_list: list, layer_num: int) → list[source]#

Reduce the port_list list and only return the port_list for layer_nums.

Parameters:

port_list (list) – The list given by user for render_design.
layer_num (int) – The layer number being rendered.

Returns:

A subset of port_list for the denoted layer_num.

Return type:

list

static get_renderer(name: str)#

Returns an already loaded and instantiated renderer.

Parameters:: name (str) – rendering name
Returns:: Renderer with the given name
Return type:: QRenderer

When user adds arguments through render_design, they do not identify the layer that the component is on. So This method returns a subset of the components which are to be rendered for the layer_num passed to this method.

Parameters:

open_pins (Union[list, None]) – Use definition from render_design.
port_list (Union[list, None]) – Use definition from render_design.
jj_to_port (Union[list, None]) – Use definition from render_design.
ignored_jjs (Union[list,None]) – Use definition from render_design.
layer_num (int) – Using this layer number, identify the components in the remaining arguments

Returns:

Subset of the components which are to be rendered for the layer_num passed to this method.

Return type:

Tuple[ Union[list, None], Union[list, None], Union[list, None], Union[list, None]]

classmethod get_template_options(design: QDesign, render_template: Dict = None, logger_: Logger = None, template_key: str = None) → Dict#

Creates template options for the Metal QRenderer class required for the class to function, based on the design template; i.e., be created, made, and rendered. Provides the blank option structure required.

The options can be extended by plugins, such as renderers.

Parameters:

design (QDesign) – A design class.
render_template (Dict, optional) – Template options to overwrite the class ones. Defaults to None.
logger (logging.Logger, optional) – A logger for errors. Defaults to None.
template_key (str, optional) – The design.template_options key identifier. If None, then use _get_unique_class_name(). Defaults to None.

Returns:

Dictionary of renderer’s default options based on design.template_options.

Return type:

Dict

get_unique_component_ids(highlight_qcomponents: list | None = None) → Tuple[list, int]#

Confirm the list doesn’t have names of components repeated. Confirm that the name of component exists in QDesign. If QDesign doesn’t contain any component, or if all components in QDesign are found in highlight_qcomponents, return an empty list; otherwise return a list of unique components to be sent to the renderer. The second returned item, an integer, specifies which of these 3 cases applies.

Parameters:

highlight_qcomponents (Union[list, None], optional) – Components to render. Defaults to None.

Returns:

Tuple: Empty or partial list of components in QDesign.

int: 0 subset selected: 1 every component selected 2 invalid

Return type:

Tuple[list, int]

initialized()#: Abstract method. Must be implemented by the subclass. Is renderer ready to be used? Implementation must return boolean True if successful. False otherwise.

jj_to_port_list_dict_populate(jj_to_port: list)[source]#

Convert jj_to_port to a searchable dict.

Parameters:: jj_to_port (list) – _description_

classmethod load()#

Load the renderer and register all its extensions. Only performed once.

Once complete, the renderer is added to the class attribute ‘__loaded_renderers__’ of QRenderer

Returns:: True if success, otherwise throws an error.
Return type:: bool

open_pin_names_not_valid(comp_name: str, pin_name: str)#

Stop and give error if the component name or pin name from open_pins are not valid within design.

Parameters:

comp_name (str) – Name of component which should have an open pin.
pin_name (str) – Name of pin which should be open.

parse_value(value: Any | List | Dict | Iterable) → Any#

Same as design.parse_value. See design for help.

Returns:: Parsed value of input.
Return type:: object

classmethod populate_element_extensions()#

Populate cls.element_extensions which will be used to create columns for tables in QGeometry tables.

The structure of cls.element_table_data should be same as cls.element_extensions.

populate_project_and_design()#: Add project and design based on user input.

port_list_dict_populate(port_list: list)[source]#

Convert the port_list to a searchable dict.

Parameters:: port_list (list) – _description_

port_list_names_not_valid(comp_name: str, pin_name: str)[source]#

Stop and give error if the component name or pin name from port_list are not valid within design.

Parameters:

comp_name (str) – Name of component which should have an open pin.
pin_name (str) – Name of pin which should be open.

render_chip(chip_name: str, draw_sample_holder: bool)#

Render individual chips.

Parameters:

chip_name (str) – Name of chip.
draw_sample_holder (bool) – Option to draw vacuum box around chip.

render_chips(draw_sample_holder: bool = True, box_plus_buffer: bool = True)#

Render all chips containing components in self.qcomp_ids.

Parameters:

draw_sample_holder (bool, optional) – Option to draw vacuum box around chip. Defaults to True.
box_plus_buffer (bool, optional) – Whether or not to use a box plus buffer. Defaults to True.

render_component(component)#

Abstract method. Must be implemented by the subclass. Render the specified component.

Parameters:: component (QComponent) – Component to render.

render_components(table_type: str, layer_num: int, port_list: list | None, jj_to_port: list | None, ignored_jjs: list | None)#

Render components by breaking them down into individual elements. Render all components of the design. If selection is none, then render all components.

Parameters:: table_type (str) – Table type (poly, path, or junction).

This render_design will add additional logic for HFSS within project. In particular, when used by BOTH solution types of eigenmode and drivenmodal.

Initiate rendering of components in design contained in selection, assuming they’re valid. Components are rendered before the chips they reside on, and subtraction of negative shapes is performed at the very end.

First obtain a list of IDs of components to render and a corresponding case, denoted by self.qcomp_ids and self.case, respectively. If self.case == 1, all components in QDesign are to be rendered. If self.case == 0, a strict subset of components in QDesign are to be rendered. Otherwise, if self.case == 2, one or more component names in selection cannot be found in QDesign.

Chip_subtract_dict consists of component names (keys) and a set of all elements within each component that will eventually be subtracted from the ground plane. Add objects that are perfect conductors and/or have meshing to self.assign_perfE and self.assign_mesh, respectively; both are initialized as empty lists. Note that these objects are “refreshed” each time render_design is called (as opposed to in the init function) to clear QAnsysRenderer of any leftover items from the last call to render_design.

Among the components selected for export, there may or may not be unused (unconnected) pins. The second parameter, open_pins, contains tuples of the form (component_name, pin_name) that specify exactly which pins should be open rather than shorted during the simulation. Both the component and pin name must be specified because the latter could be shared by multiple components. All pins in this list are rendered with an additional endcap in the form of a rectangular cutout, to be subtracted from its respective plane.

In driven modal solutions, the Ansys design must include one or more ports. This is done by adding all port designations and their respective impedances in Ohms as (qcomp, pin, impedance) to port_list. Note that an open endcap must separate the two sides of each pin before inserting a lumped port in between, so behind the scenes all pins in port_list are also added to open_pins. Practically, however, port_list and open_pins are inputted as mutually exclusive lists.

Also in driven modal solutions, one may want to render junctions as lumped ports and/or inductors, or omit them altogether. To do so, tuples of the form (component_name, element_name, impedance) are added to the list jj_to_port. For example, (‘Q1’, ‘rect_jj’, 70) indicates that rect_jj of component Q1 is to be rendered as both a lumped port with an impedance of 70 Ohms.

Alternatively for driven modal solutions, one may want to disregard select junctions in the Metal design altogether to simulate the capacitive effect while keeping the qubit in an “off” state. Such junctions are specified in the form (component_name, element_name) in the list ignored_jjs.

The final parameter, box_plus_buffer, determines how the chip is drawn. When set to True, it takes the minimum rectangular bounding box of all rendered components and adds a buffer of x_buffer_width_mm and y_buffer_width_mm horizontally and vertically, respectively, to the chip size. The center of the chip lies at the midpoint x/y coordinates of the minimum rectangular bounding box and may change depending on which components are rendered and how they’re positioned. If box_plus_buffer is False, however, the chip position and dimensions are taken from the chip info dictionary found in self.design, irrespective of what’s being rendered. While this latter option is faster because it doesn’t require calculating a bounding box, it runs the risk of rendered components being too close to the edge of the chip or even falling outside its boundaries.

Parameters:

selection (Union[list, None], optional) – List of components to render. Defaults to None.
open_pins (Union[list, None], optional) – List of tuples of pins that are open. Defaults to None.
port_list (Union[list, None], optional) – List of tuples of pins to be rendered as ports. Defaults to None.
jj_to_port (Union[list, None], optional) – List of tuples of jj’s to be rendered as ports. Defaults to None.
ignored_jjs (Union[list, None], optional) – List of tuples of jj’s that shouldn’t be rendered. Defaults to None.
box_plus_buffer (bool, optional) – Either calculate a bounding box based on the location of rendered geometries or use chip size from design class.

render_element(qgeom: Series, is_junction: bool, port_list: list | None, jj_to_port: list | None, ignored_jjs: list | None)[source]#

Render an individual shape whose properties are listed in a row of QGeometry table. Junction elements are handled separately from non- junction elements, as the former consist of two rendered shapes, not just one.

Parameters:

qgeom (pd.Series) – GeoSeries of element properties.
is_junction (bool) – Whether or not qgeom belongs to junction table.
port_list (Union[list, None], optional) – _description_. Defaults to None.
jj_to_port (Union[list, None], optional) – _description_. Defaults to None.
ignored_jjs (Union[list, None], optional) – _description_. Defaults to None.

render_element_junction(qgeom: Series, port_list: list | None = None, jj_to_port: list | None = None)[source]#

Render a Josephson junction consisting of

A rectangle of length pad_gap and width inductor_width. Defines lumped element RLC boundary condition.
A line that is later used to calculate the voltage in post-processing analysis.

At this method, ASSUME that junction is not in the ignored_jjs

Parameters:: qgeom (pd.Series) – GeoSeries of element properties.

render_element_path(qgeom: Series)#

Render one row from the qgeometry table.

Parameters:: qgeom (pd.Series) – One row from the qgeometry table.

render_element_poly(qgeom: Series)#

Render a closed polygon.

Parameters:: qgeom (pd.Series) – GeoSeries of element properties.

reset_hfss_arguments()[source]#: Reset the value to None each time render_design is started.

save_screenshot(path: str | None = None, show: bool = True)#

Save the screenshot.

Parameters:

path (str, optional) – Path to save location. Defaults to None.
show (bool, optional) – Whether or not to display the screenshot. Defaults to True.

Returns:

path to png formatted screenshot.

Return type:

pathlib.WindowsPath

set_variable(name: str, value: str)[source]#

Sets project-level variable in ANSYS.

Example usage:: self.set_variable(‘Lj_1’, ‘10nH’) self.set_variable(‘Cj’, ‘0fF’) self.set_variable(‘dimensionless’, 1/137)

Parameters:

name (str) – Name of variable.
value (str) – Amount and unit associated w/ variable.

should_render_junction(qgeom: Series, port_list: list | None, jj_to_port: list | None, ignored_jjs: list | None) → bool[source]#

Expected to be replaced by grandchild of this class.

Parameters:

qgeom (pd.Series) – _description_
port_list (Union[list, None]) – _description_
jj_to_port (Union[list, None]) – _description_
ignored_jjs (Union[list, None]) – _description_

Returns:

_description_

Return type:

bool

start(force=False)#

Call any initialization (single run) step required to setup the renderer for the first execution, such as connecting to some API or COM, or importing the correct material libraries, etc.

Parameters:: force (bool) – If True, need to scrap the existing initialization and re-do If False, will start a new one only if none exists. Defaults to False.
Returns:: is the renderer initialized successfully (thus usable?)
Return type:: bool

stop()#: Any calls that one may want to make after a rendering is complete.

subtract_from_ground(layer_num: int, data_type: int = 0)#

For each chip, subtract all “negative” shapes residing on its surface if any such shapes exist. Data is stored by layer, but we always assume each layer to be unique

Need to use a rectangular for each layer, which has fill, has been made as part of create_fill_true_box.

update_options(render_options: Dict | None = None, render_template: Dict | None = None)#

If template options has not been set for this renderer, then gather all the default options for children and add to design. The GUI would use this to store the template options.

Then give the template options to render to store in self.options. Then user can over-ride the render_options.

Parameters:

render_options (Dict, optional) – If user wants to over-ride the template options. Defaults to None.
render_template (Dict, optional) – All the template options for each child. Defaults to None.

valid_input_arguments(open_pins: list | None, port_list: list | None, jj_to_port: list | None, ignored_jjs: list | None)[source]#

The arguments should be valid names in design. Also (component, pin) pairs can not be repeated within the four arguments.

Parameters:

open_pins (Union[list, None]) – _description_
port_list (Union[list, None]) – _description_
jj_to_port (Union[list, None]) – _description_
ignored_jjs (Union[list, None]) – _description_

Returns:

_description_

Return type:

_type_